2021-10-10 14:39:17 +08:00
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#include "interrupt.h"
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#include "handlers.h"
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#include "../memory/memory.h"
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#include "../runtime/stdio.h"
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#include "../runtime/panic_assert.h"
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#include "testcode.h"
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interrupt_DescriptorTableReference *interrupt_IDTR, *interrupt_GDTR;
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bool interrupt_Enabled;
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/*
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SYSV_ABI void interrupt_MapHandler(void *handler, int interrupt) {
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//io_Printf("interrupt_MapHandler: handler %llx, int %d\n", handler, interrupt);
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uint64_t *base = (uint64_t *)(KERNEL_IDT_MAPPING + interrupt * 16ull);
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uint64_t b = 0;
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b |= (uint64_t)handler & 0xFFFFull; // Offset[15:0], 15:0
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b |= (uint64_t)GDT_EXEC_SELECTOR << 16; // Segment Selector, 31:16
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b |= IDT_TYPE_32_INTERRUPT_GATE; // Type = 32-bit Interrupt Gate, 44:40
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b |= IDT_RING0; // Ring 0, 46:45
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b |= IDT_PRESENT; // Present, 47
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b |= ((uint64_t)handler & 0xFFFF0000ull) << 32; // Offset[31:16], 63:48
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*base = b;
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*(base + 1) = (uint64_t)handler >> 32;
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}
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*/
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// defined in assembly
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SYSV_ABI void interrupt_MapHandler(void *handler, int interrupt);
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void interrupt_Init() {
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assert(sizeof(interrupt_DescriptorTableReference) == 10 && "GDTR/IDTR size must be 10 bytes");
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assert(offsetof(interrupt_DescriptorTableReference, base) == 2 && "GDTR/IDTR must be packed");
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// allocate GDTR
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io_WriteConsoleASCII("interrupt_Init() calling\n");
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// set the 2 dummy gdts
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uint64_t *gdt = (uint64_t *)KERNEL_GDT_MAPPING;
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gdt[0] = 0;
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gdt[1] = GDT_EXEC;
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gdt[2] = GDT_DATA;
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gdt[3] = GDT_EXEC_RING3;
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gdt[4] = GDT_DATA_RING3;
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io_WriteConsoleASCII("GDT Installed\n");
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2021-10-14 15:51:50 +08:00
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interrupt_LoadGDT(4 * GDT_SIZE_BYTES - 1, (void *)KERNEL_GDT_MAPPING); // set it!
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2021-10-10 14:39:17 +08:00
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io_WriteConsoleASCII("GDT OK\n");
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//interrupt_Testcode();
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io_WriteConsoleASCII("Testcode OK\n");
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interrupt_MapHandler(interrupt_Int0, 0);
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interrupt_MapHandler(interrupt_Int1, 1);
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interrupt_MapHandler(interrupt_Int2, 2);
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interrupt_MapHandler(interrupt_Int3, 3);
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interrupt_MapHandler(interrupt_Int4, 4);
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interrupt_MapHandler(interrupt_Int5, 5);
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interrupt_MapHandler(interrupt_Int6, 6);
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interrupt_MapHandler(interrupt_Int7, 7);
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interrupt_MapHandler(interrupt_Int8, 8);
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interrupt_MapHandler(interrupt_Int9, 9);
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interrupt_MapHandler(interrupt_Int10, 10);
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interrupt_MapHandler(interrupt_Int11, 11);
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interrupt_MapHandler(interrupt_Int12, 12);
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interrupt_MapHandler(interrupt_Int13, 13);
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interrupt_MapHandler(interrupt_Int14, 14);
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interrupt_MapHandler(interrupt_Int15, 15);
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interrupt_MapHandler(interrupt_Int16, 16);
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interrupt_MapHandler(interrupt_Int17, 17);
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interrupt_MapHandler(interrupt_Int18, 18);
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interrupt_MapHandler(interrupt_Int19, 19);
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interrupt_MapHandler(interrupt_Int20, 20);
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interrupt_MapHandler(interrupt_Int21, 21);
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interrupt_MapHandler(interrupt_Int22, 22);
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interrupt_MapHandler(interrupt_Int23, 23);
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interrupt_MapHandler(interrupt_Int24, 24);
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interrupt_MapHandler(interrupt_Int25, 25);
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interrupt_MapHandler(interrupt_Int26, 26);
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interrupt_MapHandler(interrupt_Int27, 27);
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interrupt_MapHandler(interrupt_Int28, 28);
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interrupt_MapHandler(interrupt_Int29, 29);
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interrupt_MapHandler(interrupt_Int30, 30);
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interrupt_MapHandler(interrupt_Int31, 31);
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interrupt_MapHandler(interrupt_Int128, 128);
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io_WriteConsoleASCII("IDT Installed\n");
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2021-10-14 15:51:50 +08:00
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interrupt_LoadIDT(KERNEL_IDT_SIZE - 1, (void *)KERNEL_IDT_MAPPING); // set it!
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2021-10-10 14:39:17 +08:00
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io_WriteConsoleASCII("IDT OK\n");
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2021-10-14 15:51:50 +08:00
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2021-10-10 14:39:17 +08:00
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interrupt_Enabled = true;
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asm volatile("sti");
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interrupt_ReloadSegments();
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io_WriteConsoleASCII("Segment Registers Reloaded\n");
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}
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